PGS134 PADAUK single-chip microcontroller 8-bit MCU with 12-bit ADC & EEPROM, KW program storage,
4KW program storage.
512 Bytes EEPROM.
256 Bytes data memory (128 * 16).
One 16-bit timer.
Two 8-bit timers (can be used as PWM generators).
Three 11-bit PWM generators (PWMG0, PWMG1, PWMG2).
Provides a comparator.
Band-gap circuit provides a 1.2V reference voltage.
Up to 14 channels of 12-bit ADC can be provided, one of which comes from the internal band-gap reference voltage or 0.25 * VDD.
ADC reference high voltage: external input, internal VDD, Band-gap 1.2V, 1.6V, 2.0V, 2.4V, 3.0V, 4.0V.
Supports multiplication instructions (1T 8x8).
22 IO pins with pull-up and pull-down resistor options.
Provides two different IO driving capabilities to meet different application requirements:
(1) PB4, PB7 drive / current = 30mA / 35mA (Strong) and 13mA / 17mA (Normal).
(2) Other IO drive / current = 11mA / (13 or 20) mA.
Each IO pin can be set to wake-up function.
Built-in 1/2 VDD LCD bias voltage generator, which can support up to 4x17 dot matrix LCD screens.
Clock source: IHRC, ILRC and EOSC (XTAL).
For all IOs with wake-up function, two optional wake-up speeds are supported: normal wake-up and fast wake-up.
Eight sections of LVR reset voltage setting: 4.0V, 3.5V, 3.0V, 2.7V, 2.5V, 2.2V, 2.0V, 1.8V.
Two sets of external interrupt pins selected according to Code Option.
CPU features:
8-bit high-performance RISC CPU.
Provides 98 valid instructions.
1T (single cycle) instruction.
Programmable stack pointer and stack depth.
Data access supports direct and indirect addressing modes.
System overview and block diagram
The PGS134 series is a CMOS 8-bit microprocessor with 12bit ADC and based on MTP for the program. It uses the RISC architecture, and the execution cycle of all instruction architectures is one instruction cycle, and only a few instructions require two instruction cycles. It has up to 4KW MTP program memory, 512 bytes of EEPROM, and 256 bytes of data memory, as well as up to 14 channels of 12-bit resolution ADC, one of which has multiple internal reference voltages to choose from. PGS134 also provides six hardware counters: one 16-bit hardware counter, two 8-bit PWM counters, and three 11-bit PWM counters. In addition, PGS134 also provides a hardware comparator and 1/2 VDD bias voltage for driving the LCD.
Pin function description
Burning method
Please use 5S-P-003 (B) for burning. 3S-P-002 and previous burners do not support the burning of PGS134.
l The burning pins of PGS134 are PA4, PA5, PA6, VDD, and GND, these 5 pins.
l When sealing (MCP) or on-board burning, special notes on voltage and current:
(1) PA5 (VPP) may be higher than 5.5V.
(2) VDD may be higher than 5.5V, and its maximum current may reach 20mA.
(3) Other burning pins (except GND) are the same as VDD.
(4) When the user uses MCP or on-board burning, the user needs to confirm that the peripheral circuit or components will not be damaged or limit the generation of the above voltages by the above voltages.
Important note:
(1) If you perform burning on the IC on the handler, please be sure to follow the instructions of APN004 and APN011.
(2) To counter the noise interference during burning, connect a 0.01uF capacitor between VDD and GND at the IC connector end of the sorter when burning. However, do not connect capacitors with a marked value above 0.01uF to avoid affecting the operation of the normal burning mode.
Users please choose the following burning modes according to the actual situation.
Normal burning mode
Jumper connection: It can be connected according to the instructions on the burner software. Please refer to the user manual of the burner "5S-P-003" to learn about the JP7 jumper mode used when using 5S-P-003 (B) for burning.
Note: In addition to ICVPP (PA5) needing to be short-circuited to the PA5 of the IC through the JP7 jumper, ICVPP2 (PA3) must also be short-circuited to the PA5 of the IC.
For example, the JP7 jumper signal connection diagram on the burner for PGS134-SOP16A is as shown below:
On-board burning mode
The so-called on-board burning refers to the situation where the IC and other peripheral circuits and components have already been soldered onto the PCB and the IC is burned. On-board burning requires the use of five leads on 5S-P-003: ICPCK (PA4), ICPDA (PA6), VDD, GND, and ICVPP (PA5).
In Figure 23, the '☆' can represent a capacitor or resistor. It is used to isolate the burning leads and other circuits. The resistance should be ≥ 10KΩ, and the capacitor should be ≤ 220pF.
Note:
l Generally speaking, the voltage-limited burning mode should be used for on-board burning. Please refer to the detailed description of the voltage-limited burning mode.
l There should be no 5.0V or less voltage regulator diodes or other circuits or components that clamp the generation of 5.0V between VDD and GND on the PCB.
l There should be no capacitors with a marked value of 500uF or more connected between VDD and GND on the PCB.
l Generally speaking, the pins PA4, PA5, and PA6 for burning signals cannot be used as strong output pins.
On-board burning in the self-powered mode
PGS134 also supports on-board burning by the way of being powered by the customer's circuit board. To use this function, it is necessary to set "On-board Program w/ Self-Power" in the burning file, which can be set in the To Package menu of the burner software. Or add the package parameter setting in the original code in the form of a command, and refer to the burner user manual for detailed operations.
The burner will detect the VDD voltage on the customer's circuit board before burning. So please ensure that the VDD voltage on the circuit board is higher than 2.5V. If the VDD voltage on the application board is lower than 2.5V, the burner will display the error "Find a diff. IC." The rest is the same as the on-board burning mode powered by the burner.
Converter PDK to Package:
When you check the self-powered ISP option, if the CodeOption PAC.5 is set to Enable, when PA5 outputs low, the burning may damage the IC. Therefore, when PA5 is set to 0utput, it can support the on-board self-powered ISP Mode, but it is not recommended to use it.
Use ICE
To simulate PGS134, please use the 5S-I-S01/2 (B) external simulation board 5S-I-GB001, refer to the following picture:
Please note the following matters during simulation:
(1) Regarding the simulation timing
l During simulation, especially when simulating the functions related to EEPROM and PxPL, 5S-I-S01/2 (B) will communicate with the simulation board 5S-I-GB001, so the simulation may be slightly slower than the actual IC, which mainly affects the following register configurations: EERL/EERMC/STEER/LDEER/MISC2/INTRQ/INTRQ2/PAPL/PBPL/PCPL/LPWMGxC/LPWMGxDTH/LPWMGxDTL/LPWMGCLK/LPWMBCUBH/LPWMCUBL, etc.
(2) Regarding the simulation voltage
l During simulation, affected by the working voltage of the simulation board, it is recommended that the simulation voltage ≥ 2.5V.
(3) Other matters to note
l During the simulation of 5S-I-S01/2 (B), the RAM operations of instructions NMOV/SWAP/NADD/COMP are not supported.
l During the simulation of 5S-I-S01/2 (B), SYSCLK = ILRC/16 is not supported.
l During the simulation of 5S-I-S01/2 (B), the dynamic setting of misc.4 (can only be fixed at 0 or 1) is not supported.
l During the simulation of 5S-I-S01/2 (B), the functions of Tm2.gpcrs/Tm3.gpcrs are not supported.